Electronic accumulator in which the component trigger circuits are operated relatively continuously



Nov. 14, 1961 A. H. DICKINSON 3,008,639

ELECTRONIC ACCUMULA'IOR IN WHICH THE. COMPONENT TRIGGER CIRCUITS ARE OPERATED RELATIVELY CONTINUOUSLY Filed April 16, 1954 s Sheets-Sheet 1 OSCILLATOR KEYBOARD Nov. I4, 1961 A. H. DICKINSON 3,008,639

ELECTRONIC ACCUMULATOR IN WHICH THE COMPONENT TRIGGER CIRCUITS ARE OPERATED RELATIVELY CONTINUOUSLY Filed April 16, 1954 s Sheets-Sheet 2 Nov. 14, 1961 A. H. DICKINSON 3,008,639

ELECTRONIC ACCUMULATOR IN WHICH THE COMPONENT TRIGGER CIRCUITS ARE OPERATED RELATIVELY CONTINUOUSLY 3 Sheets-Sheet 3 Filed April 16, 1954 OQQEQQEBE :0 mmm0nmmn m g m United, States Patent C 3,008,639 ELECTRONIC ACCUMULATOR IN WHICH THE COMPONENT TRIGGER CIRCUITS ARE OPER- ATED RELATIVELY CONTINUOUSLY Arthur H. Dickinson, Greenwich, Conn., assignor to International Business Machines Corporation, New York, N.Y., a corporation of New York Filed Apr. 16, 1954, Ser. No. 423,815 5 Claims. (Cl. 235-173) This invention relates to apparatus employing electron valve means such as trigger circuits, and more specifically to electronic accumulators, and has for its object operating such devices whereby the component trigger circuits are operated relatively continuously. The principle of the invention may, however, be adapted to other types of apparatus using electron valve means.

According to the method of operation here disclosed, the accumulator orders, which are capable of remaining in stable states, operate continuously in the absence of differential value entries and have their operation interrupted only upon entry of such values.

The registers, widely employed in electronic accounting and computing machines for purposes such as stor age and the algebraic summation of values, usually comprise trigger circuits based on the cross coupling of vacuum tubes. When one tube conducts the other is shut 011?. The frequency of reversal in the conduction status of the two tubes is directly related to the amount of use required of the register. Such use varies all the Way from the substantially continuous to a very infrequent operation.

Experience with registers in the latter type of service indicates that operation of the trigger circuits may be erratic. More specifically, the tubes which are in shutolf condition for long periods of time do not respond to triggering pulses.

The location of such tube failure is believed to be its cathode and the cause is the formation of a high internal resistance, termed interface resistance. Briefly, over a period of time, when a tube is cut off and the anodecathode current is little or nil, an insulating compound forms between the oxide and its supporting core. This results in reduced current flow when conduction is' required. Where the duty cycle of a vacuum tube is high the value of the interface resistance is maintained low.

Registers for differential values may also be constructed of semiconductors such as crystal diodes and transistors either alone or in combination with vacuum tubes. Where registers are comprised of trigger circuits employing semiconductors alone it has been found that adjustment must be made to start the device, that adjustments must be made during their operation, and that there is a minimum keying pulse repetition rate.

The cause of such difi'iculty is attributable to an inherent characteristic of presently available semiconductor materials such as germanium and silicon wherein variations in temperature of the material affect electrical characteristics. The temperature variations are largely induced by and dependent upon the conduction status of the semiconductor employed as a diode or as a transistor.

A high duty cycle for register triggers, comprising transistors alone or transistor-tube combinations, has beneficial effects. -In the case of an all-transistor trigger a relatively constant operating temperature level is maintained. Thus, electrical characteristics are relatively constant and circuit tolerances are broadened. In the case of the transistor-tube trigger two results are achieved. The effect of the tubes interface resistance is maintained low. Further, any residual effects of temperature variations on the transistor, not previously compensated for by the tube, are reduced if not eliminated.

in the accompanying drawings FIGS. 1A and 1B are a circuit diagram of the instrumentalities employed and their connecting circuits, and FIG. 2 is a time chart showing the sequence of operations during two complete cycles.

The machine has a standard keyboard with a column of keys representing the ten digits from each order. Each key that is depressed closes a circuit which remains closed throughout the entry cycle. The entry cycle is initiated by depressing a motor bar on the keyboard, and at the conclusion of the entry cycle the keys and motor bar are released, re-setting the keyboard for the next entry cycle.

In addition to the keys, each order of the keyboard has a control pentode designated in the diagram FIG. 1A, V16U, V16T, V16H and V16TH for the units, tens, hundreds and thousands orders respectively. The associated resistors are marked R40U, R40T, R40H, and R40TH, respectively. Each of the nine digits has a resistor marked DR to DR respectively. The resistors DR are connected to the 1 keys in all four orders of the keyboard, the resistors DR to all the 2 keys, and so on, so that on depressing a key in the keyboard a circuit is made with the order selecting pentode and also with the appropriate resistor. A standard multivibrator oscillator, as designated in FIG. 1A, is employed for pro ducing timing and controlling impulses.

Certain of these pulses are employed to drive a fivesection commutator continuously. The sections of the commutator are designated CO5, C 94, C 8-3, C 7-4, and C 6-1, respectively, and the resistors DR etc. are so connected to the commutator as to interrupt the entry into the accumulator of that number of impulses which is the complement of the digit represented by the depressed key. Two complete cycles of operation of this commutator delimit a complete entry cycle. The first ten index points are employed to effect the entry of the amount entered upon the keyboard, by interrupting the entry of the appropriate number of impulses into the accumulator through the entry triggers, one for each order marked EU, ET, EH, and ETh in FIG. 1B for the units, tens, hundreds, and thousands orders respectively of the accumulator. These triggers are normally on and continuously transmit to the several orders of the accumulator ten impulses for each complete entry of twenty index points except when an amount to be entered is set up on the keyboard and the motor bar is depressed. The units, tens and hundreds have carry circuits marked Cu, Ct and Ch in FIG. 1B, but these circuits are off except when the motor bar is depressed and hence the successive entry of ten impulses during the cycles occurring between entries through the keyboard resets the accumulator orders at the same digital value at the end of each such cycle.

The second portion of the entry cycle, comprising ten index points, is employed for carry effecting purposes, which take place only during those cycles when a numberset up on the keyboard is entered by depressing the motor bar.

This motor bar causes a single entry control device, so marked in FIG. 1A and comprising two triggers T and T to function in a manner such that one entry cycle of twenty index points follows in correct timed relationship with the commutator. The machine also has a reset device, so marked in FIG. 1A and a supplemental commutator C 10. The function of these devices will be later described.

In the drawings the elements such as tubes, resistors, condensers, etc. are indicated by the conventional symbols for such elements, and reference characters are applied to such of these elements as are referred to in the following description. The make-up of the several instrumentalities will not be specifically described, but will be clearly apparent from the drawings and the description of the operation of the machine. Reference will also be made to the time chart FIG. 2 which shows the status of the various instrumentalities at the successive index points in the complete entry cycles of the numbers 9 3 and 0 4 0 5 used as specific examples in the description which follows.

From power supplies, not shown, suitable potentials are applied to lines 2, 4, 6, 8 and 10, and to the heaters of various vacuum tubes. The wiring of the heaters is not included.

The oscillator includes tubes V2 and V4- and operates in the usual manner to provide square wave impulses. The impulses produced on R2 are differentiated and applied to the grid of V6. Since the grid bias of V6 is normally zero only the falling front of a pulse derived from R2 effects V6. The negative pulse produced by such falling front causes V6 to shut off and positive pulses to be continually produced on wire 20. The square wave pulses produced on R4 are differentiated and applied to the grid of V8. The grid bias of this tube is also zero and, accordingly, negative pulses only are effective and cause V8 to shut off. The resulting positive pulses are applied through wire 22 to tubes V12 of triggers EU and ET for the units and tens orders and through tubes V14 of the triggers EH and ETH of the hundreds and thousands orders.

The pulses on wire are employed to operate the fivestage commutator. The 0-5 stage is shown in FIG. 1 and the other stages indicated by box diagrams. Since the impulses on wire 20 are produced continuously, such commutator likewise functions continuously. The timing diagram (FIG. 2) shows the pattern of wave forms produced as the various stages in the commutator (FIG. 1A) function sequentially. It should be mentioned that this commutator automatically adjusts itself to the proper sequential pattern of operation irrespective of the on and off status of the component stages when the power is turned on. A supplementary commutator stage C-10 is provided. The impulses for driving C-10 are derived from R-8 of the C 0-5 stage of the commutator and are applied thereto via wire 26.

Whenever the potential drop across R-8 increases, a negative pulse is produced on wire 26 and this pulse is effective to switch C-10 either on or off. Since a negative pulse is produced on wire 26 once every ten index point positions, C-II is alternately on and off for ten index point positions. One complete operation of C-10 delimits one complete entry cycle.

The negative pulse on wire 26 is applied twice each cycle to junction 60 in entry triggers E and E for the units and tens orders respectively. The elfect of such impulse is to turn E and E on. The R6, R28 junction of commutator stage C 0-5 is coupled to wire 28 by condenser C2 and wire 28 returns to line 10 through resistor R30 of entry trigger Eth of the thousands order. Wire 28 also connects to the grids of tubes V10 included in entry triggers E of the hundreds? order and E Normally, the grid bias of all tubes V10 is highly negative and, accordingly, the respective tubes V10 are shut oif. It is understood, therefore, that a negative pulse on wire 28 has no effect on a tube V10. When the R6, R28 junction of commutator stage C 0-5 rises in potential, the resulting pulse on wire 28 is effective to cause the tubes V10 to conduct, thus switching triggers E and E to on status.

With the entry triggers on, the control grid bias of tubes V12 of triggers E and E and tubes V14 of triggers E and E is zero. The impulses on wire 22 cause anode current to flow in the tubes V12 and negative pulses to be produced on resistors R32 of triggers E and E These negative pulses are effective to continuously impulse the units and tens orders of the accumulator. The impulses on wire 24 are effective to cause anode current to flow in the tubes V14. The resulting negative pulses on resistors R32 of triggers E and E are effective tocontinuously impulses the hundreds and thousands accumulator orders.

In starting up the machine, when there is application of power to the various lines and to the heaters, the pattern of on and off status established by the accumulator triggers is largely a matter of chance, and the phase relationship may differ not only between the accumulator orders themselves, but also between the accumulator orders and the commutator. Provision must be made, therefore, to establish the correct phase relationship not only between all orders of the accumulator but also between such orders and the commutator prior to effecting entries. The detailed manner in which this resetting op eration is carried out is described subsequently. It is suflicient to here state that the result of a resetting operation is to establish the on and off pattern of the accumulator triggers such that all orders pass from 0 to 1 in response to the keying pulse just following the reset pulse.

After the reset is effected the entry of the first number 0593 is made. The first step is to depress the 0, 5, 9, and 3 keys in the thousands, hundreds, tens and units orders, respectively, of the keyboard. Such operation causes closure of contacts 8T H, 5H, 9T and 3U. The closed 0TH contact maintains the suppressor grid of V16TH at the potential of line 6. The closure of keyboard contacts SH, 9T and 3U connect the suppressor grids of V16H, V16T and V16U to resistors DRS, DR9 and D'R3, respectively. Even though such connections are established, the pulses applied to the suppressor grids of the three V16 tubes has no effect on the anode current flow at this time inasmuch as their control grids are highly negatively biased.

Initiation of the actual entry is effected by manual manipulation of the motor bar ST. Condenser C4 is charged to a potential equal to that developed across R34. Cperation of the motor bar reverses the position of the contacts ST allowing the condenser 04 to discharge across R36. The resulting positive pulse causes V18 to conduct momentarily, thus shifting T1 in the single entry control device to on status. This manually initiated operation can occur at any time with respect to a complete cycle of operation of the commutator.

With T1 in on status, the screen grid voltage of V20 is at a raised potential. The control grid of V28 connects to R38 which receives a positive impulse when supplementary commutator C-10' goes on. Accordingly, at the time when such action occurs, the positive pulse received by the V29 control grid, in combination with the raised screen potential, causes V20 to conduct momentarily thus shifting time delay trigger T2 from off to on status. Such action is shown occurring in the timing diagram (FIG. 2). It should be mentioned that the shifting of C-10 from off to on status denotes the beginning of a complete entry cycle. With T2 on, its point 62 is substantially at the potential of line 4 thereby reducing the control grid bias for tubes V16H, V-lfiT and V16U to substantially Zero. The control grid bias of Vl6'H-I also is reduced to zero, but to no effect.

It has been previously mentioned that all orders of the accumulator are continually impulsed except when entries and carries are to be effected. It has also been previously mentioned that an entry of a chosen digit is effected by interrupting the continuous operation of the order in which said digit is to be entered for a period of time proportional to the true complement of such digit. Upon entry of 0593- the continuous operation of the units order is interrupted for seven index points, the tens order is interrupted for a single index point, and the hundreds order is interrupted for five index points. Prior to to effecting entry, it is assumed that the accumulator is established in -0000- status, that is, is reset. When such condition obtains, all orders of the accumulator stand at 9999 at D (beginning ofa cycle) and at onehalf index point after D are impulsed and all advance to -0000. This is clearly seen by reference to the timing diagram (FIG. 2).

The closure of keyboard contacts 3U (FIG. 1A) connects DR3 with the suppressor grid of V16U. Accordingly at 7 in the entry cycle, the pulse applied to the suppressor grid of V16U causes it to conduct and a negative pulse is produced on R40U. The R40U, V16U junction is coupled to the entry trigger E at condenser 7 C6. Thus, the negative pulse on R40U is effective to switch E off. Such action is shown occurring at 7 in FIG. 2. With E (FIG. 1B) 01f, V12 is rendered non-conductive and the keying pulses supplied to the V12 suppressor grid from wire 22 are no longer effective to impulse the units order triggers. The interruption brought about by this action is shown in FIG. 2. The closure of contacts 9T (FIG. 1A) in the tens order couples the suppressor grid of V16T to DR9'. The pulse on DR9 at 1 causes V16T to momentarily conduct and the negative pulse produced on R40T shuts oif E at this time. i

The impulse appearing on DRS (FIG. 1A) at the 5 time in the cycle is effective through the now closed keyboard contacts 51-1 to reduce the suppressor grid bias of V16H. The resulting negative pulse appearing on R40H is applied to the E gate trigger turning it off. With this trigger oif, further impulsing of the hundreds order in interrupted commencing at the 5 time in the cycle. See FIG. 2.

Inasmuch as no entry is to be effected into the thousands order, E remains on throughout the entry portion of the cycle and the thousands order is continually impulsed as shown in FIG. 2.

At the termination of the entry portion of a cycle, the commutator trigger C -5 (FIG. 1A) switches on and the negative pulse developed on wire 26 switches the triggers E and E, to on status. The positive pulse on wire 28 causes E to turn on. Accordingly, at one-half an index point following such action, impulsing of the first three orders of the accumulator is resumed. It is seen from the timing diagram, FIG. 2, that at such onehalf index point following 0, the units order stands at 3-, the tens order at 9, the hundreds order stands at -5 and the thousands order stands at 0-.

The first three orders of the accumulator are provided with carry circuits which includes carry triggers designed C C and C FIG. 1B. The detailed mode of operation of these triggers during the entry portion of a complete cycle will be later described. It is sufficient to here state that, if any carry trigger is in off status at the 11 time in a cycle, no carry is applied to the next higher order. Reference to FIG. 2 indicates that the carry triggers are off at the time specified. This is to be expected since the addition was of the amount -0593 to 0OO0.

The single entry control device is reset at the conclusion of an entry cycle to receive the next entry. When the commutator trigger C 6-1 operates at l in a cycle, a positive pulse is produced on R42, to which is connected the control grid of V22. Since T2 is 'on, the

, described in detail.

6 screen grid of V22 is at raised potential. Accordingly, the positive pulse produced on R42 renders V22 conductive, thus switching T1 off. Subsequently at 0 when CO-5 operates, a positive pulse is produced on R44 to which is connected the control grid of V24. The screen grid of V24 is now at high potential, since T1 is off. Thus, the aforementioned positive pulse on R44 causes V24 to momentarily conduct thereby switching T2 off. With T2 off, its junction 62 drops in potential sufficiently to maintain any of the tube V16 non-conductive even though digit representing pulses continue thereafter to be applied to the V16 suppressor grids. At the conclusion of the entry cycle the keys and motor bar are released in the usual manner by mechanism not shown.

On entering the second number -4008 on the keyboard, the OTH, 4H, 0T and 8U contacts are closed.-

Manipulation of motor bar ST to a reverse position from that shown initiates a second complete cycle of twenty index point positions. During the entry portion of this cycle, the units and hundreds order entry triggers E, and E turn off at 2-and 6, respectively. Accordingly, continuous operation of the units order and the hundreds order are respectively interrupted for two index point positions'and six index point positions.

The addition of 8- to 3 in the units position requires that a carry be determined and applied to the tens order. Since the tens order stands at 9-, following the first entry and has -0- added thereto,'during the second entry the application of the carry increment from the units order requires that the tens order pass this carry along to the hundreds order. Since the hundreds order stands at -5 following the first entry and receives a 4-- during the second entry, the application thereto or the carry from the tens order requires that it pass a carry along to the thousands order. The manner in which carries are determined and effected will now be As each order ofthe accumulator is continuously impulsed, it is manifest that each order passes from -9 to 0- sometime between D and 0 (FIG. 2) when no entry is applied thereto. If a carry were effected at each cycle of impulses a 1 would be added to each order except the units order at each cycle, and hence there must be no carry unless the order receives an entry. A carry, however, is required whenever an order reaches 9 after D and before 0 and such order receives an entry. Provision is made, therefore, for determining when an order reaches 9 in the interval specified and further for determining the presence of an entry. Such is accomplished in the following manner.

A carry trigger is provided in conjunction with the three lower orders. These carry triggers are impulsed on at.D every cycle. Upon any order reaching .9 prior to 0, the associated carry trigger is switched off. If there is an entry, the carry trigger is switched on. Thus, the presence of the two conditions in a D to 0 interval causes the carry trigger to be on at the beginning of the carry portion of the cycle. Manifestly,.if there is no entry the carry trigger is off following 0. A carry is effected into a higher order when a carry trigger is 0 following 0.

The pattern of operation of any order containing a -9- is such that at 11, (FIG. 2) the stages of such orders manifest the 9. This condition is employed to effect carries through ordens which stand at 9- and receives carries from lower orders.

The entry of 0593- with all the orders standing at 0 is an example of an entry requiring no carry. At the beginning of any complete twenty-point cycle, the carry triggers C C and C are turned on. At such D time, commutator trigger 0-10 switches on and the positive pulse on R38 renders tube V26 conductive. A negative pulse is produced on resistors R48 and R50, and wires 32 and 34, respectively. The negative pulse on Wire 32 is effective to switch C and C on and the negative pulse on wire-34 causes C to switch on. With T2 on, its junction 62 is substantially at the potential of line 4 and the control grid bias of tubes V28 in the carry triggers is zero. When the units order gate trigger E switches off at 7, a positive pulse is developed at its junction 64. This pulse is applied tothe suppressor grid of V28 associated with C rendering V28 momentarily conductive. The negative pulse developed on R48 causes C to switch oiI. No further actuation of C occurs during the entry portion of the cycle (see FIG. 2) since the units order does not reach 9- prior to 0."

Referring now to the tens order (FIG. 1B), the gate trigger E, switches off at l and the positive pulse produced by the rise in potential of its point 64 causes V28 related to C to conduct, thereby switching C oif. No further actuation of C occurs during the entry portion of the cycle (see FIG. 2), since the tens order does not reach -9- prior to 03' With T2 (FIG. 1A) on, as explained previously, there is an increased potential drop across its resistor R72. Wire 42 connects from a point on R72 to the grid of V45. The raised potential drop across R72 causes V45 to become more conductive, increasing the potential drop across R74. This potential rise across R74 is effective to prime tubes V30 and V48 without causing them to conduct. When gate trigger E switches 01f at 5 in the cycle, the resulting decreased current flow through R50 causes a positive pulse to be applied to the grid of V30. Since V30 is primed, the pulse applied to V30 causes it to conduct and the negative pulse produced on R52 causes C to switch 0E. As is true in the case of C, and C no further actuation of C occurs during the remaining portion of the entry cycle and, accordingly, all carry triggers are off at l 1" in the succeeding half of the complete cycle. With these carry triggers all in oil status, no carries are applied to any of the various orders.

At the beginning of this second entry cycle, the switching of C- causes V26 to conduct and negative pulses to appear on wires 32 and 34. As previously described, these pulses cause the switching on of all carry triggers. With T2 on, the control grids of tubes V28 and V32 are at zero bias and V45 is more conductive, thus priming V30 and V48.

Reference to FIG. 2 indicates that the units order reaches 9 at one-half after 4. The grid of V34 (FIG. 1B) connects to junction 60 (ST8) and the grid of V36 connects to the junction 60 (ST1). As the units order reaches 9 both tubes V34 and V36 are shut off and current flow through R54 decreases. The resulting positive pulse is applied to R56 which renders V32 conductive. The negative pulse developed on R148 is applied to C switching this trigger off. At 2 in this cycle when E -switches off, the positive pulse derived from junction 64 (E is applied to the suppressor of V28 and again causes a negative pulse to appear on R148 thereby returning C to on status. See FIG. 2.

In connection with the tens order, the trigger circuits reach 9 at one-half after D. Accordingly, V34 and V36 (FIG. 1B) in this order are both shut oif at this time and the positive pulse on R54 is applied to R56 rendering V32 conductive. The negative pulse on R48 switches C oif. Since there is no entry of a digit into this order, E remains in on status until the end of the cycle and, accordingly, C remains off.

The entry of -4- into the hundreds order causes the E gate trigger to switch off at 6. The positive pulse on R50 at such time renders V30 conductive and the negative pulse on R52 causes C to switch off. Since the hundreds order does not reach 9 prior to 0, C remains ofi. In the entry cycle in which 0408 is added to 0593-, it is seen by reference to FIG. 2 that the units order carry trigger C is on and that the remaining carry triggers Q and C are oif at the beginning of the second portion. It may be further observed that at one-half after 0 both tbe-tens-and-hundreds orders-stand at 9.. Under these conditions it is seen therefore that the carry which is applied to the tens order must likewise be applied to the hundreds and thousands order.

Such carry operations are initiated at 11. Since C is on, the control grid bias of V12 (C is zero. Reference to FIG. 2 indicates that C-lt) is ofi at l l. Accordingly, the control grid bias of V33 (FIG. 1A) is now zero. The operation of the commutator during the second portion of a cycle causes a positive pulse to appear on DR1 at 11. This pulse is applied to the suppressor grid of V38. The momentary conduction of V38 causes a negative pulse to appear on R58 and this negative pulse is applied via wire 36 to R60. The grid of V40 connects to R60, and it is seen that V40 is normally zero biased. The negative pulse so applied to V40 shuts it off momentarily and a positive pulse appears on R62. This positive pulse, in turn, is applied to the suppressor grid of V12, C and causes anode current to flow not only through V12 but also R40T. The result of this action is to cause gate trigger E to switch off at ll. See FIG. 2.

The negative pulse on R401 is simultaneously applied to R60 and the grid of V40 in the tens order. The resulting positive pulse on R62 in this order is applied to the suppressor grid of V42. The control grid of V42 connects to resistor R64. Since the tens order stands at -9- at the 11" time, both V34 and V36 in this order are non-conductive and there is a high potential drop across R64, thus reducing the control grid bias of V42 to zero. The pulse on R62, therefore, causes V42 to conduct and a negative pulse to appear on plate load resistor R40H common to tubes V42, V48 and V16H. This pulse causes the E trigger to switch oif at 11.

The negative pulse on R40I-I is also applied to the grid of V40 in the hundreds order. A positive pulse is produced on R62 and applied to the suppressor grid of V42. Reference to FIG. 2 indicates that at 11 the hundreds order stands at 9-. Accordingly, ST1 and ST8 (FIG. 1) are on in the hundreds order and transistors TR2 and TR4 are concurrently conductive.

The collector circuits of TR2 and TR4 return to line 10 via R76 and R78, respectively. With these transistors conductive there is a large potential drop across both R76 and R78. Thus, the control grid and suppressor grid bias of V50 is substantially zero and the potential drop across R80 is low and V52 is shut oif. Since this is the case, there is a large potential drop across R64 to which is connected the control grid of V42. The pulse on R62 causes V42, therefore, to momentarily conduct and a negative pulse to be produced on R40TH. This pulse is applied to the E trigger turning it off.

Thus, at 11 in the carry portion of this entry cycle in which 0408 is added to -0593- impulsing of the tens, hundreds and thousands orders of the accumulator ceases. This action continues until the switching of CO-S Resetting As previously mentioned, provision is made for resetting the electronic accumulator to -0000-. Such action occurs on a timed basis and is manually initiated. The effect of such operation is to instantaneously turn oif any of the accumulator triggers which may be on. The operation is carried out without interruption of the continual impulsing of the accumulator orders and, accordingly, resetting occurs at a time which is displaced from normal impulsing time by one-half an index point position. In order that the accumulator orders (FIG. 1) represent 0O0O with respect to a complete commutator cycle, it is required that the first of the continual impulses be received by such zeroized orders at either one-half after 9 in a cycle, or one-half after 11 in a cycle. That is to say, it is required that reset to 0000- be effected either at 9 or at 11 in order that the accumulator advance to 1ll1 on the next continual impulse. The 11 time was arbitrarily chosen as the reset time.

The positive pulse continually produced on R62 at 11 is applied to the suppressor grid of V44. With reset switch SR open, the control grid bias of V44 is highly negative. The closure of SR initiates a reset by reducing the control-grid bias of V44 to zero. The next positive pulse at 11 received by the suppressor grid of V44 renders -it conductive and a negative pulse appears on R66. This negative pulse is applied to the grid of normally zero-biased tube V46, causing it to shut off. A positive pulse appears on R68 and wire 38. This wire extends to all triggers in the units and tens orders of the accumulator via diodes D2. The shut off of tube V46 causes the potential of wire 38 to rise from considerably below that of line 4 to considerably above. In this manner all triggers in these two orders including the carry triggers are shut off. The negative pulse on R66 is also applied to R70 and wire 40. Wire 40 extends to all triggers of the tens and hundreds orders via diodes D4. Normally the potential of wire 40 is substantially that of line 4. The negative pulse on R70 also carries the potential of wire 40 considerably below that of line 4 thus instantaneously shutting off the trigger circuits in the hundreds and thousands orders including the carry triggers.

A resetting operation is shown occurring in the righthand portion of FIG. 2 and it is seen that it occurs at a time which does not interfere with the continual impulsing of all orders. Furthermore, all orders advance from -O0 to -1111- at one-half after 11 as fundamentally required.

In this embodiment of my invention each complete cycle restores the register orders to the condition existing at the beginning of the cycle so that there is no change in the totals accumulated. That is to say, a total print op eration at the conclusion of any cycle, assuming no additional entries were made, would be the same notwithstanding the continuous impulsing of the register orders. In the apparatus illustrated the entry circuits are so modified that the digits registered on the keyboard are not added to the respective orders by transmitting the indicated number of impulses to such orders as in the customary operation, but by interrupting the continuous transmission of impulses to an extent corresponding to the complement of the digits entered on the keyboard, and the carry circuits are modified so as to correctly carry forward to the next order the required added impulses only in the cycle of operations where an entry is made on the keyboard.

It will be understood, however, that the disclosed apparatus for continuously impulsing the register orders may be modified. For example, the carry circuits can be allowed to function during the cycle when no entry is made on the keyboard by providing means for adding 1" to the digits order for each cycle. By such procedure 10,000 would in effect be added to the four register orders for each cycle of operation thereby restoring the units, tens, hundreds and thousands orders to the same condition at the conclusion of each cycle.

The apparatus might also be so modified as to interrupt the continuous impulsing of all the registered orders upon an entry being made on the keyboard and restormg the continuous impulsing at the conclusion of the cycle in which the entry is made.

It is to be understood, therefore, that my invention is not limited to the specific apparatus disclosed in the specification and drawings, but covers all such modifications hereof as fall within the scope of the appended claims.

The term registers is used in the appended claims in a broad sense to include electronic apparatus contain- 10 ing a plurality of interconnected circuits capable of op erating through successive complete cycles with the circuit restored at the end of the cycle to its initial condition, and not in a narrow sense to imply any particular interconnection or any particular use to which the apparatus is put.

I claim:

1. In an electronic register in which information is accumulated and stored in an electronic accumulator capable of remaining in stable states and in which said stored information normally utilizes only a part of said electronic accumulator, the improvement which includes means for generating information to cycle the electronic accumulator through a whole number of cycles, means to transmit said generating cyclic information to said electronic accumulator, and means to intermittently interrupt said transmission to apply information to be acmulated and stored to said accumulator.

2. In an electronic register having a cyclic information accumulator including a plurality of binary stages, the electronic circuitry for each stage including at least two electronic valve elements which are alternately rendered on or off as information is applied and in which accumulated information is represented by the pattern of on and off statuses of said electronic valve elements, the improvement which comprises means to generate information to cycle said accumulator through a whole number of cycles during each cycle of which each of said electronic valve elements is rendered conductive, means to transmit said generated information to said accumulator, and means to intermittently interrupt said transmission to apply information to be accumulated to said accumulator.

3. An electronic register having a plurality of ascending orders, the electronic circuitry for each order including a plurality of electronic valve elements interconnected so as to be cyclically actuated upon the repeated application of information and including means interconnecting the circuitry of each order to the circuitry of the next higher order to actuate the next higher order once during the cycle of each order, means for generating cyclic information to cycle said electronic circuitry of each order through a whole number of cycles, means to transmit said cyclic information to the electronic circuitry of each order to cycle the circuitry thereof through a whole number of cycles and simultaneously to interrupt said interconnecting means, and means to intermittently interrupt the transmission of said cyclic information for a selected portion of said cycle corresponding to selected information to be accumulated, to accumulate said selected information in said electronic register.

4. An electronic register as set forth in claim 3 in which said means to intermittently interrupt the transmission of said cyclic information includes digit selecting means, and means controlled by said digit selecting means to interrupt said transmission for a portion of said cycle equal to the complement of said selected digit.

5. A plural-ordered electronic decimal accumulator comprising, a plurality of bi-stable electronic valve circuits interconnected within the respective orders to manifest by their relative stability statuses the modulo ten sum of impulses entered into each of the respective orders in parallel; means for entering a carry impulse into the next higher order whenever the modulo ten sum of any given order exceeds nine; means for entering ten impulses into each order of the accumulator in each cycle of operation; means for suppressing the carry during each said cycle entering the ten impulses; entry control means for registering the digital values of numbers to be entered in the respective orders of the accumulator; means under control of said entry means, and active during one cycle, for blocking the entry of that number of the continuously entered ten pulses which is equal to the tens complement of the digital values to be entered 11 into the respective orders; and means active during the cycle When said entry means is controlling, to activate the carry circuits; whereby every bi-stable circuit is operated during those cycles when the pulses are entered so as to obviate any deleterious effect of inactivity on said valve circuits.

References Cited in the file of this patent UNITED STATES PATENTS 2,403,873 Mumma July 9, 1946 2,580,740 Dickinson Jan. 1, 1952 2,587,979 Dickinson Mar. 4, 1952 Woods-Hill Dec. 23, 1952 Phelps Jan. 6, 1953 Robinson et al. Nov. 27, 1956 Bruce et al. Mar. 12, 1957 Tootill et a1. Apr. 23, 1957 FOREIGN PATENTS France Oct. 14, 1953 OTHER REFERENCES lication Co., 1950. Page 325 relied on.

UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent No. 3,,OO8 639 November 141 196 Arthur H. Dickinson- It is hereby certified that error appears in the above numbered patent requiring correction and that the said Letters Patent should read as corrected below.

Column 4, line 18, for "impulses" read impulse column 5, line 12, strike out "to"; first occurrence; line 43, for "in" read is line 58, fter "order" first occurrence insert stands line 61, for "includes" read include column 6 line 10, for "tube" read tubes line 16 for "4008" read -0408- column 11 line 4 before "pulses" insert ten Signed and sealed this 10th day of April 1962.

(SEAL) Attest:

ERNEST W. SWIDER DAVID L. LADD Attesting Officer Commissioner of Patents 

